C++ programmer · Graphics & systems

Graphics &
low-latency systems.

I'm Jonathan Liu. I build rendering engines, GPU kernels and concurrent C++ infrastructure. My work centres on data locality, explicit synchronisation and profiling the critical path.

Focused on graphics engineering and systems programming for high-frequency trading.

GitHub View Projects ↓
01

Two domains. Shared foundations.

01 / GRAPHICS

From pixels to pipelines.

Real-time rendering, software rasterisation and GPU compute. I work across the CPU–GPU boundary, with attention to frame time, memory traffic and synchronisation.

Explore rendering projects
02 / HFT SYSTEMS DIRECTION

From events to execution.

Bringing C++ concurrency, cache-aware programming and network I/O experience to low-latency trading systems. My current portfolio demonstrates the underlying systems work.

Explore systems projects

GPU & Graphics

Vulkan 1.3, SPIR-V, Compute Shaders, OpenGL, CUDA Kernel Optimisation, Real-time & Offline Rendering

Languages

C++17 (primary), C, Python, GLSL, Slang, CUDA C/C++, ARM Assembly

Concurrency & Memory

SIMD (SSE/AVX2), TBB, OpenMP, std::atomic, Lock-Free, Warp Intrinsics, Boost.Asio

Profiling & Systems

Nsight Systems/Compute/Graphics, RenderDoc, perf, flame graphs, GDB/LLDB, Linux, Docker, CMake

02

Engineering in practice

Real-Time Rendering

Vulkan-Platform

A Vulkan 1.3 rendering engine with multi-queue architecture, timeline semaphore synchronisation, GPU particle systems, and dynamic rendering — optimised for maximum GPU utilisation with profiler-driven iteration using Nsight and RenderDoc.

Vulkan 1.3 C++17 GLSL / Slang Compute Shaders SPIR-V
  • ~91× frame time reduction (424ms → 4.66ms) via profiler-guided pipeline redesign
  • 268 FPS sustained at 700K triangles, CPU submission overhead 0.02–0.1ms
  • Compute-shader particle system — 16K particles/dispatch, <0.01ms
  • Cross-platform: Linux, Windows, macOS (MoltenVK)
View on GitHub
VULKAN / FRAME TIME

4.66ms

After profiler-guided pipeline redesign

Before424 ms
After4.66 ms

Same project. A shorter critical path.

CPU Rasterisation & Path Tracing

Software-Rasterizer

A CPU rendering pipeline combining AVX2 rasterisation, Whitted-style ray tracing, and Monte Carlo path tracing with importance sampling — optimised with SIMD vectorisation and TBB parallelism.

AVX2/SSE TBB Path Tracing BVH C++17
  • 17.1ms/frame median at 1024×1024, ~6K triangles (1000-frame benchmark)
  • 8 fragments/vector AVX2 pipeline with early-out on coverage + z-test masks
  • 2048 SPP Cornell Box in ~14 min via TBB parallel_reduce
  • Cross-platform SIMD via SIMDe abstraction layer
View on GitHub
CPU / SOFTWARE RASTERISATION

17.1ms

Median frame time · 1,000-frame benchmark

1024²resolution
~6Ktriangles

8 fragments per AVX2 vector

Concurrency · Memory · Compute

libHPC

A CUDA and C++ HPC library with warp-synchronous algorithms, lock-free concurrency, and CPU memory hierarchy benchmarks. The CPU work explores contention, data locality and atomic operations; GPU kernels are profiled with NVTX, Nsight Compute, and perf flame graphs.

CUDA C++17 Lock-Free SIMD Nsight
  • GPU radix sort: 500M keys in 360ms / 1.39B keys/s on RTX 3080 Ti
  • ABA-safe lock-free MPMC queue — 48-bit VA + 16-bit refcount in single atomic
  • Cache-tiling 6.4× and false-sharing elimination 5.6× speedups on i7-12800HX
  • Full NVTX instrumentation with Nsight Compute multi-pass metrics
View on GitHub
CUDA / RADIX SORT

1.39B

Keys per second · RTX 3080 Ti

500Mkeys sorted
360 mssort time
AtomicsMemoryProfiling
Network I/O · Tail Latency

Distributed IM System

A microservice messaging platform with Boost.Asio TCP long-connections, gRPC inter-service communication, custom TLV binary protocol with compile-time safety constraints, and stress-tested to 50K concurrent connections.

Boost.Asio gRPC C++17 Redis Docker
  • 50K concurrent connections, ~60K msg/s, p99 5.4ms RTT on loopback
  • No message loss observed in a 17.9M-message test
  • Custom SFINAE-constrained TLV serialization across Qt + Boost stacks
  • ASan + GDB regression harness for concurrency stress testing
Browse GitHub profile
NETWORK I/O / TAIL LATENCY

5.4ms

p99 round-trip time · loopback test

50Kconnections
~60Kmessages / sec

No message loss in the 17.9M-message test.

Bare-Metal Systems

ARMv8-A Kernel

Bare-metal bring-up on Cortex-A72 (Raspberry Pi 4B): assembly boot, MMU configuration, interrupt subsystem, and cooperative scheduling — debugged through JTAG, GDB, and UART tracing.

ARMv8-A C/C++ ARM Assembly GDB/OpenOCD
  • EL1→EL0 exception level transition with full context save/restore
  • TTBR-based multi-level page tables for kernel, MMIO, and user-space
  • IRQ routing for timer, UART, GPIO peripherals with SVC trap handling
  • Cooperative context switching validated via single-step JTAG debugging
ARMv8-A / EXECUTION LEVELS
EL1EL0

Kernel → user-space transition

MMUIRQContext

Cortex-A72 · Raspberry Pi 4B

Let's talk

Seeking graphics engineering and C++ systems programming roles, including low-latency infrastructure for HFT. Open to opportunities in Shanghai and across the APAC region.

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